Title :
An enhanced macromodel for a CMOS operational amplifier for HDL implementation
Author :
Aggarwal, Sudhir
Author_Institution :
SGS-Thomson Microelectron., Noida, India
Abstract :
In this paper, an enhanced macromodel for an operational amplifier is presented which takes into account the second order effects such as the gain-nonlinearity, the noise, the d.c. power-supply rejection and the slew-rate limitations. Implementation of the macromodel in one of the commercial HDLAs, and its comparison with a device level simulation illustrates the accuracy of the macromodel
Keywords :
CMOS analogue integrated circuits; circuit analysis computing; hardware description languages; integrated circuit modelling; operational amplifiers; CMOS operational amplifier; DC power-supply rejection; HDL implementation; HDLAs; device level simulation; gain-nonlinearity; high-level description language; macromodel; second order effects; slew-rate limitations; Hardware design languages; Microelectronics; Noise generators; Operational amplifiers; Power supplies; Switches; System-level design; Transient response; Variable structure systems; Voltage control;
Conference_Titel :
VLSI Design, 1996. Proceedings., Ninth International Conference on
Conference_Location :
Bangalore
Print_ISBN :
0-8186-7228-5
DOI :
10.1109/ICVD.1996.489626
