DocumentCode
3283585
Title
An enhanced macromodel for a CMOS operational amplifier for HDL implementation
Author
Aggarwal, Sudhir
Author_Institution
SGS-Thomson Microelectron., Noida, India
fYear
1996
fDate
3-6 Jan 1996
Firstpage
331
Lastpage
332
Abstract
In this paper, an enhanced macromodel for an operational amplifier is presented which takes into account the second order effects such as the gain-nonlinearity, the noise, the d.c. power-supply rejection and the slew-rate limitations. Implementation of the macromodel in one of the commercial HDLAs, and its comparison with a device level simulation illustrates the accuracy of the macromodel
Keywords
CMOS analogue integrated circuits; circuit analysis computing; hardware description languages; integrated circuit modelling; operational amplifiers; CMOS operational amplifier; DC power-supply rejection; HDL implementation; HDLAs; device level simulation; gain-nonlinearity; high-level description language; macromodel; second order effects; slew-rate limitations; Hardware design languages; Microelectronics; Noise generators; Operational amplifiers; Power supplies; Switches; System-level design; Transient response; Variable structure systems; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1996. Proceedings., Ninth International Conference on
Conference_Location
Bangalore
ISSN
1063-9667
Print_ISBN
0-8186-7228-5
Type
conf
DOI
10.1109/ICVD.1996.489626
Filename
489626
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