DocumentCode
3283616
Title
KANSYS: a CAD tool for analog circuit synthesis
Author
Gupta, S.K. ; Hasan, M.M.
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol., Kanpur, India
fYear
1996
fDate
3-6 Jan 1996
Firstpage
333
Lastpage
334
Abstract
A CAD tool for the synthesis of analog circuits has been developed. The approach adopted is top down, knowledge intensive hierarchical design. A flattened view of the design is not however lost sight of and design knowledge over various levels of hierarchy is also used to achieve desirable performance. Practical sized transistor circuit designs are synthesized for CMOS opamps and some of the functional circuits from performance and process specifications
Keywords
analogue integrated circuits; circuit CAD; integrated circuit design; knowledge based systems; CAD tool; KANSYS; analog circuit synthesis; design knowledge; functional circuits; hierarchy; knowledge intensive hierarchical design; process specifications; transistor circuit designs; Analog circuits; CMOS process; Circuit optimization; Circuit synthesis; Computer architecture; Design automation; Equations; Flowcharts; Mirrors; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1996. Proceedings., Ninth International Conference on
Conference_Location
Bangalore
ISSN
1063-9667
Print_ISBN
0-8186-7228-5
Type
conf
DOI
10.1109/ICVD.1996.489627
Filename
489627
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