DocumentCode
3283845
Title
Analysis and Design of Moderate Length Regular LDPC Codes with Low Error Floors
Author
Cole, Chad A. ; Wilson, Stephen G. ; Hall, Eric K. ; Giallorenzi, Thomas R.
Author_Institution
Virginia Univ., Charlottesville, VA
fYear
2006
fDate
22-24 March 2006
Firstpage
823
Lastpage
828
Abstract
The traditional method to estimate code performance in the higher SNR region is to use a sum of the contributions of the most dominant error events to the probability of error. If an ML decoder is used, these events will be minimum distance codewords; the traditional decoder used in LDPC codes, some variant of the message passing algorithm, will introduce non-codeword error events known as trapping sets. For long LDPC codes it is difficult to enumerate all of these dominant error events. A procedure to efficiently find dominant error events by using the regular low-density structure of an LDPC code is presented here. The search method can be adapted to work with LDPC codes of various regular and irregular degree distributions, but is especially suited to a very practical subset of LDPC known as regular {3, 6} codes of moderate block length. We also show how codes with very low error floors can be created by utilizing this search method.
Keywords
error statistics; maximum likelihood decoding; message passing; parity check codes; LDPC code; error probability; low density parity check; maximum likelihood decoder; message passing algorithm; search method; AWGN; Additive white noise; Cities and towns; Decoding; Hamming weight; Hardware; Message passing; Parity check codes; Search methods; Signal to noise ratio; LDPC; error floors; trapping sets;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Sciences and Systems, 2006 40th Annual Conference on
Conference_Location
Princeton, NJ
Print_ISBN
1-4244-0349-9
Electronic_ISBN
1-4244-0350-2
Type
conf
DOI
10.1109/CISS.2006.286581
Filename
4067922
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