Title :
Vlsi Timing Simulation With Selective Dynamic Regionization
Author :
Yu, Meng-Lin ; Ackland, Bryan D.
Keywords :
Circuit simulation; Computational modeling; Discrete event simulation; Logic circuits; Read-write memory; SPICE; Switches; Timing; Very large scale integration; Voltage;
Conference_Titel :
Computer-Aided Design, 1994., IEEE/ACM International Conference on
Print_ISBN :
0-8186-3010-8
DOI :
10.1109/ICCAD.1994.629765
