Title :
A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications
Author :
Lanuzza, Marco ; Perri, Stefania ; Corsonello, Pasquale ; Margala, Martin
Author_Institution :
Univ. of Calabria, Rende
Abstract :
This paper presents MORA, a new coarse-grain reconfigurable architecture optimized for multimedia processing. The system has been designed to provide a dense support for arithmetic operations, wide internal data bandwidth and efficiently distributed memory resources. All these characteristics are combined in a cohesive structure to efficiently support a block-level pipelined dataflow, which is particularly suitable for stream-oriented applications. Moreover, the new reconfigurable architecture is highly flexible and easily scalable. MORA (multimedia oriented reconfigurable array) has drastically improved performance- and area- efficiency compared to the state of the art FPGA, DSP and other reconfigurable systems in executing multimedia-oriented applications. In computing 8times8 2D DCT, MORA delivers orders of magnitude times higher throughput efficiency compared to Morphosys, Virtex-4 or TMS320DM642-720 DSP architectures.
Keywords :
data flow computing; digital arithmetic; distributed memory systems; multimedia computing; pipeline processing; reconfigurable architectures; 2D DCT; arithmetic operations; block-level pipelined dataflow; cohesive structure; distributed memory resources; internal data bandwidth; multimedia applications; multimedia oriented reconfigurable array; multimedia processing; reconfigurable coarse-grain architecture; stream-oriented application; Arithmetic; Bandwidth; Computer applications; Digital signal processing; Discrete cosine transforms; Field programmable gate arrays; Multimedia systems; Reconfigurable architectures; Streaming media; Throughput;
Conference_Titel :
Adaptive Hardware and Systems, 2007. AHS 2007. Second NASA/ESA Conference on
Conference_Location :
Edinburgh
Print_ISBN :
978-0-7695-2866-3
DOI :
10.1109/AHS.2007.10
