DocumentCode
3284688
Title
H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture
Author
Major, Adam ; Nousias, Ioannis ; Khawam, Sami ; Milward, Mark ; Yi, Ying ; Arslan, Tughrul
Author_Institution
Univ. of Edinburgh, Edinburgh
fYear
2007
fDate
5-8 Aug. 2007
Firstpage
134
Lastpage
138
Abstract
We present a new de-blocking filter module fully optimised for use on a recently introduced dynamically reconfigurable, instruction cell based architecture. The module consists of a novel combination of standard software transforms alongside architecture specific techniques and aims to reduce reconfiguration overheads and increase utilisation of resources. Our proposed filter outperforms the standard FFMpeg based filter code on the target architecture by 4.5 times.
Keywords
adaptive filters; field programmable gate arrays; reconfigurable architectures; transform coding; video coding; H.264/AVC in-loop de-blocking filter; architecture specific techniques; dynamically reconfigurable instruction cell; standard software transforms; Adaptive filters; Automatic voltage control; Bit rate; Computer architecture; Decoding; Fabrics; ISO standards; Scheduling algorithm; Software standards; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Adaptive Hardware and Systems, 2007. AHS 2007. Second NASA/ESA Conference on
Conference_Location
Edinburgh
Print_ISBN
978-0-7695-2866-3
Type
conf
DOI
10.1109/AHS.2007.58
Filename
4291911
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