• DocumentCode
    3285005
  • Title

    Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application

  • Author

    Osterloh, B. ; Michalik, H. ; Fiethe, B. ; Bubenhagen, F.

  • Author_Institution
    Tech. Univ. Braunschweig, Braunschweig
  • fYear
    2007
  • fDate
    5-8 Aug. 2007
  • Firstpage
    258
  • Lastpage
    262
  • Abstract
    Data Processing Units (DPUs) in space application as a reconfigurable System-on-Chip solution (SoC) based on a FPGA have been already successfully demonstrated in the Venus Express mission, providing the capability of flexibility and reliability for system design. An enhanced reconfigurable System-on-Chip solution for future space missions also includes the ability to re-program hardware functions even in-flight. The reconfigurable System-on- Chip solution is introduced and the flexibility and reliability of this approach are outlined. Furthermore the requirements for an enhanced SoC design with in-flight reconfigurability for space application are presented.
  • Keywords
    aerospace computing; reconfigurable architectures; system-on-chip; FPGA; field programmable gate arrays; reconfigurable system-on-chip data processing unit; space application; Cameras; Data processing; Field programmable gate arrays; Hardware; Instruments; Single event upset; Space missions; Space vehicles; System-on-a-chip; Venus;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Adaptive Hardware and Systems, 2007. AHS 2007. Second NASA/ESA Conference on
  • Conference_Location
    Edinburgh
  • Print_ISBN
    978-0-7695-2866-3
  • Type

    conf

  • DOI
    10.1109/AHS.2007.47
  • Filename
    4291929