Title :
A New Behavioural Power Modelling Approach for FPGA based Custom Cores
Author :
Chandrasekaran, S. ; Amira, A.
Author_Institution :
Brunel Univ., Uxbridge
Abstract :
Field Programmable Gate Arrays (FPGAs) are gaining acceptance as the preferred platform for a number of applications including those with mobility and performance constraints. While FPGAs continue to scale impressively in terms of device geometries, multi-million gate capacities add near-ASIC performance, newer issues such as power consumption and energy aware design seek urgent attention. While FPGA design tools have reached considerable levels of maturity in a short span of time, a lot of work remains to be done in the area of high level power estimation which needs to be integrated into the design cycle. In this paper, a novel behavioural/functional level power modelling methodology called " Functional Level Power Analysis and Modelling (FLPAM)" that provides a good trade off between complexity and accuracy, and enables the designer to achieve incremental improvements in power and energy metrics throughout the design process has been presented. The proposed approach is successfully validated using custom IP cores for FPGAs on a number platforms.
Keywords :
field programmable gate arrays; functional analysis; logic design; low-power electronics; FPGA design tool; custom IP core; energy aware design; field programmable gate array; functional level power analysis; functional level power modelling; power consumption; CMOS technology; Clocks; Design engineering; Energy consumption; Field programmable gate arrays; Integrated circuit modeling; Performance gain; Power dissipation; Power engineering and energy; Power system modeling;
Conference_Titel :
Adaptive Hardware and Systems, 2007. AHS 2007. Second NASA/ESA Conference on
Conference_Location :
Edinburgh
Print_ISBN :
978-0-7695-2866-3