Title :
Multiprecision division on an 8-bit processor
Author :
Rice, Eric ; Hughey, Richard
Author_Institution :
Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA
Abstract :
Small processors can be especially useful in massively parallel architectures. This paper considers multiprecision division algorithms on an 8-bit processor (the Kestrel processor, currently in fabrication) that includes a small amount of memory and an 8-bit multiplier. We evaluate several variations of the Newton-Raphson reciprocal approximation methods for use with division. Our final single-precision algorithm requires 41 cycles to divide two 24-bit numbers to produce a 26-bit result. The double-precision version requires 98 cycles to divide two 53-bit numbers to produce a 55-bit result. This low cycle count is the result of several techniques, including low-precision arithmetic, early introduction of dividends, and simple (yet good) initial reciprocal estimates
Keywords :
Newton-Raphson method; digital arithmetic; microprocessor chips; parallel architectures; 8 bit; 8-bit processor; Kestrel processor; Newton-Raphson reciprocal approximation methods; cycle count; double-precision version; early dividend introduction; initial reciprocal estimates; low-precision arithmetic; massively parallel architectures; multiprecision division algorithms; single-precision algorithm; Arithmetic; Concurrent computing; Costs; DNA; Dynamic programming; Fabrication; Parallel architectures; Proteins; RNA; Sequences;
Conference_Titel :
Computer Arithmetic, 1997. Proceedings., 13th IEEE Symposium on
Conference_Location :
Asilomar, CA
Print_ISBN :
0-8186-7846-1
DOI :
10.1109/ARITH.1997.614881