DocumentCode :
3286418
Title :
Implementing multiply-accumulate operation in multiplication time
Author :
Stelling, Paul F. ; Oklobdzija, Vojin G.
Author_Institution :
Dept. of Comput. Sci., California Univ., Davis, CA, USA
fYear :
1997
fDate :
6-9 Jul 1997
Firstpage :
99
Lastpage :
106
Abstract :
Multiply-accumulate is an important and expensive operation. It is frequently used in digital signal processing and video/graphics applications. As a result, any improvement in the delay for performing this operation could have a positive impact on clock speed, instruction time and processor performance. In this paper, we show how, by extending our view of a parallel multiplier, we can apply recent innovations in parallel multiplier design to multiply-accumulators. This application results in multiply-accumulators that are as fast as multipliers of the same size (these multipliers have been shown to result in provably optimal delays faster than current designs). This allows a single (optimal multiply-accumulate) circuit to be used for both operations without delay penalty. As a result, multiply-accumulate can be efficiently and effectively implemented as an instruction in RISC CPUs. Additionally, the circuit design reduces the number of devices needed over current fast multiplier designs, so that real estate and power savings also result
Keywords :
clocks; computer graphic equipment; delays; digital arithmetic; digital signal processing chips; multiplying circuits; reduced instruction set computing; RISC CPU; VLSI circuits; circuit design; clock speed; digital signal processing; final adder; graphics applications; instruction time; multiplication time; multiply-accumulate operation; optimal delays; optimal multiply-accumulate circuit; parallel multiplier; partial product reduction tree; power savings; processor performance; video applications; Adders; Application software; Circuits; Clocks; Computer graphics; Computer science; Delay; Digital signal processing; Reduced instruction set computing; Time division multiplexing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Arithmetic, 1997. Proceedings., 13th IEEE Symposium on
Conference_Location :
Asilomar, CA
ISSN :
1063-6889
Print_ISBN :
0-8186-7846-1
Type :
conf
DOI :
10.1109/ARITH.1997.614884
Filename :
614884
Link To Document :
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