Title :
Modeling and measurement of supply noise induced jitter in a 12.8Gbps single-ended memory interface
Author :
Hai Lan ; Minghui Han ; Schmitt, Renata
Author_Institution :
Rambus Inc., Sunnyvale, CA, USA
Abstract :
Analyzing power supply noise characteristics and predicting its jitter impact is critical in designing the 12.8Gbps single-ended memory interface achieving better than 5mW/Gbps energy efficiency. The clocking circuit jitter performance is characterized by jitter sensitivity. The power supply noise induced jitter (PSIJ) is derived by combining the noise spectrum and sensitivity profile. The final PSIJ prediction matches closely with the on-chip measurement result.
Keywords :
circuit noise; clocks; integrated memory circuits; jitter; power supply circuits; bit rate 12.8 Gbit/s; clocking circuit jitter performance; jitter impact prediction; jitter measurement; jitter modeling; noise spectrum; on-chip measurement; power supply noise characteristics; power supply noise induced jitter; sensitivity profile; single-ended memory interface; Clocks; Correlation; Jitter; Noise; Noise measurement; Sensitivity; System-on-a-chip; jitter; noise; power integrity;
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2012 IEEE 21st Conference on
Conference_Location :
Tempe, AZ
Print_ISBN :
978-1-4673-2539-4
Electronic_ISBN :
978-1-4673-2537-0
DOI :
10.1109/EPEPS.2012.6457839
