Analytical thermal model for silicon-on-insulator MOSFET structures

We present analytical thermal models developed recently for SOI MOSFET structures based on the concept for the SOI film thermal resistance, different from the conventional SOI channel thermal resistance. The models are able to accommodate multiple devices on the same Si island or on separate islands in SOI integrated circuits. Heat flow in interconnects and poly lines can be properly incorporated into these models. The models are verified with 2D device and 3D interconnect simulations.