DocumentCode :
3288694
Title :
Built-in self-diagnostic by space-time compression of test responses
Author :
Karpovsky, Mark G. ; Chaudhry, Saeed M.
Author_Institution :
Dept. of Electr., Comput. & Syst. Eng., Boston Univ., MA, USA
fYear :
1992
fDate :
7-9 April 1992
Firstpage :
149
Lastpage :
154
Abstract :
Presents two different methodologies for built-in self-diagnostic of boards and systems by space-time compression of test responses. The first method, soft decision, uses nonbinary multiple error-correcting codes to obtain space-time signatures. These obtained signatures and the corresponding precomputed references are compared and magnitudes of distortions in signatures are analyzed to identify faulty components. The second method, hard decision, makes use of the information indicating whether the corresponding signatures are distorted or not. Both approaches show considerable savings in hardware overheads when compared with a straightforward approach where a separate signature is required for every component. A transition from the soft to hard decision approach results in an increase in the number of signatures required for diagnostic but at the same time it results in a decrease in the complexity of a fault locating algorithm. Results pertaining to VLSI implementations are presented where the hardware overhead is estimated in terms of two-input equivalent gates.<>
Keywords :
VLSI; built-in self test; design for testability; error correction codes; fault location; logic testing; BIST; DFT; VLSI implementations; built-in self-diagnostic; fault locating algorithm; faulty components; hard decision; hardware overheads; logic testing; nonbinary multiple error-correcting codes; precomputed references; soft decision; space-time compression; space-time signatures; test responses; Automatic testing; Built-in self-test; Design engineering; Error correction codes; Fault diagnosis; Hardware; Information analysis; Laboratories; System testing; Systems engineering and theory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1992. '10th Anniversary. Design, Test and Application: ASICs and Systems-on-a-Chip', Digest of Papers., 1992 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-7803-0623-6
Type :
conf
DOI :
10.1109/VTEST.1992.232740
Filename :
232740
Link To Document :
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