DocumentCode
3288730
Title
Total ionizing dose effects on 64 Mb 3.3 V DRAMs
Author
Lee, C.I. ; Nguyen, D.N. ; Johnston, A.H.
Author_Institution
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
fYear
1997
fDate
35635
Firstpage
97
Lastpage
100
Abstract
64 Mb 3.3 V CMOS DRAMs from two different manufacturers were tested for total dose. Retention time, power supply current, and functionality were used to characterize device response. Burned-in devices failed functionally at lower total dose levels. Results showed that these scaled DRAMs are about twice as hard as older generation 16 Mb commercial DRAMs
Keywords
CMOS memory circuits; DRAM chips; integrated circuit reliability; integrated circuit testing; radiation effects; 3.3 V; 64 Mbit; CMOS DRAMs; burned-in devices; device response; functionality; power supply current; retention time; total ionizing dose effects; Aerodynamics; Clocks; Current supplies; Energy consumption; Laboratories; Propulsion; Random access memory; Space technology; System testing; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Radiation Effects Data Workshop, 1997 IEEE
Conference_Location
Snowmass Village, CO
Print_ISBN
0-7803-4061-2
Type
conf
DOI
10.1109/REDW.1997.629805
Filename
629805
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