Title :
A totally self-checking checker for a parallel unordered coding scheme
Author :
Burns, Steven W. ; Jha, Niraj K.
Author_Institution :
International Paper Co., Jay, ME, USA
Abstract :
Bose has developed a parallel unordered coding scheme using only r checkbits for 2/sup r/ information bits. This code can detect all unidirectional errors and requires simple parallel encoding/decoding. The information symbols can be separated from the check symbols. However, the information symbols containing all-0´s and all-1´s need to be transformed to two other information symbols. This allows one to reduce the number of checkbits over Berger code by 1. Since information symbols containing a power-of-two number of bits are quite common, this coding scheme should become quite popular. In this paper, a modular, economical and easily testable totally self-checking (TSC) checker design for the above code is described. The TSC concept is well-known for providing concurrent error detection of transient as well as permanent faults. The design is self-testing with at most only 2r+16 codeword tests. This means that if k is the number of information bits, the size of the codeword test is only O(log/sub 2/k). This is the first known TSC checker design for this code.<>
Keywords :
VLSI; built-in self test; encoding; error detection codes; logic testing; codeword tests; concurrent error detection; information symbols; parallel unordered coding scheme; permanent faults; totally self-checking checker; transient faults; unidirectional errors; Automatic testing; Circuit faults; Circuit testing; Decoding; Electrical fault detection; Encoding; Fault detection; Milling machines; Power generation economics; Very large scale integration;
Conference_Titel :
VLSI Test Symposium, 1992. '10th Anniversary. Design, Test and Application: ASICs and Systems-on-a-Chip', Digest of Papers., 1992 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-7803-0623-6
DOI :
10.1109/VTEST.1992.232743