3D packaging: where all technologies come together

Cell phones and consumer products like digital cameras, PDAs and other wireless devices require maximum functional integration in the smallest footprint, lowest profile and low cost package. CSPs have minimized the footprint to achieve a chip/package area ratio about 80%. 3D packaging has increased that ratio to the impressive level of > 200% without increasing the thickness or the footprint of the package. Integration in the z-direction is achieved by stacking die or stacking packages and interconnecting them with wire bonding. 3D packages are assembled using the established packaging infrastructure and supply chain which offers design flexibility, short time-to-market, low risk and low cost product introduction. 3D packaging poses two challenges. First, the stacking of more chips in a thinner package stretches the performance envelope of all assembly process, materials and equipment. Narrower process margins, thin layer materials, equipment with higher precision and flexibility require trade-offs to minimize risk and cost without compromising the reliability of the package. Second, the testing of the final module requires that package design allow access to all the chips. Integration of complex chips from multiple suppliers in one package creates a high value module and increased test complexity.