Title :
Techniques to increase sequential ATPG performance
Author :
Macii, E. ; Meo, A.R.
Author_Institution :
Dept. of Electr. & Comput. Eng., Colorado Univ., Boulder, CO, USA
Abstract :
An automatic test pattern generation (ATPG) system for sequential circuits is described. Techniques such as testability measures, 9-valued functions, incompatibility function and fault simulation have been added to the basic algorithm in order to increase the fault coverage and reduce the test generation time. The entire ATPG system has been benchmarked on the set of ISCAS89 circuits.<>
Keywords :
automatic testing; fault location; logic testing; sequential circuits; 9-valued functions; ISCAS89 circuits; automatic test pattern generation; fault coverage; fault simulation; incompatibility function; sequential ATPG performance; sequential circuits; testability measures; Automatic test pattern generation; Benchmark testing; Circuit faults; Circuit testing; Flip-flops; Power generation; Sequential analysis; Sequential circuits; System testing; Time measurement;
Conference_Titel :
VLSI Test Symposium, 1992. '10th Anniversary. Design, Test and Application: ASICs and Systems-on-a-Chip', Digest of Papers., 1992 IEEE
Conference_Location :
Atlantic City, NJ, USA
Print_ISBN :
0-7803-0623-6
DOI :
10.1109/VTEST.1992.232762
