Title :
Performance evaluations of stacked CSP memory modules
Author :
Solberg, Vern ; Gray, Gordon
Author_Institution :
Tessera, Inc., San Jose, CA, USA
Abstract :
Two market trends that have been evident for some time are increasing microprocessor speeds and the increasing demand for additional functionality in electronic systems. These market trends in turn are driving the need for increased memory density and higher performance memory in systems such as personal computers, laptop computers and servers. To address these requirements, memory module manufacturers are looking to technologies capable of meeting these dual demands and at the same time keep overall costs trending down. New generations of dynamic random access memory (DRAM) such as double data rate (DDR) and next generation DDR2 technologies are contributing significantly toward increased system performance. Several options, including Tessera´s stacked chip scale packaging (CSP), have been developed to address these high-density memory and performance requirements. Several critical issues surround this effort to increase the density and performance of electronic products. Form factor, electrical performance, thermal performance, reliability, cost and manufacturability. Future potential for higher density package technology will be outlined as it relates to trends in high density and high performance market needs. The following will examine the company´s μZ™-Ball Stack package configurations.
Keywords :
DRAM chips; ball grid arrays; chip scale packaging; integrated circuit manufacture; microassembling; microprocessor chips; modules; printed circuit manufacture; μZ™-Ball Stack package; cost; double data rate technology; dynamic random access memory; electrical performance; electronic products; electronic system functionality; form factor; high-density memory requirement; higher performance memory; laptop computers; manufacturability; memory density; memory module manufacturers; microprocessor speed increasing; next-generation DDR2 technologies; performance evaluation; performance requirement; personal computers; reliability; servers; stacked CSP memory modules; stacked chip scale packaging; thermal performance; Chip scale packaging; Costs; DRAM chips; Electronic packaging thermal management; High performance computing; Manufacturing; Microcomputers; Microprocessors; Portable computers; Random access memory;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2004. IEEE/CPMT/SEMI 29th International
Print_ISBN :
0-7803-8582-9
DOI :
10.1109/IEMT.2004.1321679