Title :
A comparison of data prefetching on an access decoupled and superscalar machine
Author :
Jones, G.P. ; Topham, N.P.
Author_Institution :
Dept. of Comput. Sci., Edinburgh Univ., UK
Abstract :
We investigate the behavior of data prefetching on an access decoupled machine and a superscalar machine. We assess if there are benefits to using the decoupling paradigm given that an out-of-order (o-o-o) superscalar architecture could in principle prefetch to the same degree as an access decoupled machine. We have found that for large issue width the access decoupled machine can hide memory latency more effectively than a single instruction window o-o-o superscalar architecture. Our findings also demonstrate that an access decoupled machine offers the benefit of reducing the complexity of window issue logic
Keywords :
cache storage; instruction sets; parallel architectures; parallel machines; performance evaluation; access decoupled machine; cache storage; data prefetching; decoupling paradigm; large issue width; memory latency; out-of-order superscalar architecture; superscalar machine; window issue logic; Arithmetic; Clocks; Computer architecture; Computer science; Costs; Delay; Logic design; Microprocessors; Parallel processing; Prefetching;
Conference_Titel :
Microarchitecture, 1997. Proceedings., Thirtieth Annual IEEE/ACM International Symposium on
Conference_Location :
Research Triangle Park, NC
Print_ISBN :
0-8186-7977-8
DOI :
10.1109/MICRO.1997.645798
