DocumentCode :
328991
Title :
One variable stochastic simulated annealing channel router
Author :
Kim, Won Gyoum ; Bae, Seong Yong ; Lee, Won Don
Author_Institution :
Dept. of Comput. Sci., Chung Nam Nat. Univ., Daejon, South Korea
Volume :
2
fYear :
1993
fDate :
25-29 Oct. 1993
Firstpage :
1582
Abstract :
In the layout design of VLSI chips, channel routing is one of the key problems. The problem is to route a specified net list between two rows of terminals with two-layers. Nets are routed with horizontal segments on one layer and vertical segments on the other. Connections between two layers are made through via holes. In this paper, we propose the "one-variable stochastic simulated annealing channel router" based on the mean field approximation in order to overcome the difficulties in evaluating the spin average value expressed by the integral in such a network. Some results are presented. Experimental result shows that this method finds optimal solutions with some example problems, and is a promising method in channel routing.
Keywords :
VLSI; integrated circuit layout; network routing; neural nets; simulated annealing; VLSI chip layout design; mean field approximation; one-variable stochastic simulated annealing channel router; spin average value; via holes; Educational institutions; Integral equations; Integrated circuit interconnections; Pins; Routing; Simulated annealing; Stochastic processes; Temperature; Very large scale integration; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 1993. IJCNN '93-Nagoya. Proceedings of 1993 International Joint Conference on
Print_ISBN :
0-7803-1421-2
Type :
conf
DOI :
10.1109/IJCNN.1993.716903
Filename :
716903
Link To Document :
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