• DocumentCode
    3290510
  • Title

    Bluetooth transceiver design with VHDL-AMS

  • Author

    Ahola, Rami ; Wallner, Daniel ; Sida, Marius

  • Author_Institution
    Spirea AB, Stockholm, Sweden
  • fYear
    2003
  • fDate
    2003
  • Firstpage
    268
  • Abstract
    This paper describes the design challenges of BlueTraC™, a low-cost, low-power radio transceiver and the usage of mixed-signal/mixed-mode techniques and behavioral modeling with ADVance MS (ADMS) from Mentor Graphics to address and solve them. BlueTraC™ from Spirea is a Bluetooth 1.1 compliant class 2 radio transceiver. In addition to all the required RF and analog functions, the chip also includes a complete digital GFSK modem, making it a very complex mixed-signal (MS) system-on-chip (SoC). VHDL-AMS, the mixed-signal IEEE 1076.1 standard modeling language, was used to describe the SoC building blocks at different levels of detail and complexity. This permitted us to perform top level functional verification and debugging, as well as detailed subsystem simulations throughout the design process. We present the concept and the results we obtained, in terms of performance and accuracy. The methodology that we deployed increased the confidence in silicon success and allowed on time delivery.
  • Keywords
    Bluetooth; circuit simulation; formal verification; frequency shift keying; hardware description languages; integrated circuit design; integrated circuit modelling; low-power electronics; mixed analogue-digital integrated circuits; modems; system-on-chip; transceivers; ADMS; BlueTraC low-power transceiver; Bluetooth 1.1 compliant transceiver; IEEE 1076.1 standard modeling language; SoC building blocks; VHDL-AMS; behavioral modeling; class 2 radio transceiver; debugging; digital GFSK modem; low-cost radio transceiver; mixed-signal/mixed-mode IC; subsystem simulations; system-on-chip; top level functional verification; Add-drop multiplexers; Bluetooth; Debugging; Graphics; Modems; Process design; Radio frequency; Radio transceivers; Silicon; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2003
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-1870-2
  • Type

    conf

  • DOI
    10.1109/DATE.2003.1186707
  • Filename
    1186707