DocumentCode :
3290952
Title :
An implementation method of Canny edge detection algorithm on FPGA
Author :
Xu, Zhengdong ; Yuan, Kui ; He, Wenhao
Author_Institution :
Inst. of Autom., Chinese Acad. of Sci., Beijing, China
fYear :
2011
fDate :
15-17 April 2011
Firstpage :
3958
Lastpage :
3962
Abstract :
Canny algorithm is an excellent edge detection algorithm and is widely used in the field of image processing. But the usage of Canny algorithm on the embedded image processing platform has been restricted since it needs a large amount of computation. In this paper, a parallelized architecture of Canny algorithm and its implementation on FPGA are proposed based on the analysis of the computing procedure of Canny algorithm. Experimental results show that, both good performance and high processing speed of edge detection can be obtained using the method proposed in this paper.
Keywords :
edge detection; field programmable gate arrays; parallel architectures; Canny edge detection algorithm; FPGA; embedded image processing; image processing; parallelized architecture; Algorithm design and analysis; Digital signal processing; Field programmable gate arrays; Helium; Image edge detection; Random access memory; Canny; FPGA; OpenCV; edge detection;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electric Information and Control Engineering (ICEICE), 2011 International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-8036-4
Type :
conf
DOI :
10.1109/ICEICE.2011.5778193
Filename :
5778193
Link To Document :
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