DocumentCode :
3290975
Title :
Adding Slow-Silent Virtual Channels for Low-Power On-Chip Networks
Author :
Matsutani, Hiroki ; Koibuchi, Michihiro ; Wang, Daihan ; Amano, Hideharu
Author_Institution :
Keio Univ., Yokohama
fYear :
2008
fDate :
7-10 April 2008
Firstpage :
23
Lastpage :
32
Abstract :
In this paper, we introduce the use of slow-silent virtual channels to reduce the switching power of on-chip networks while keeping the leakage power small. Adding virtual channels to a network improves the throughput until each link bandwidth is saturated. This enables us to reduce the switching power of on-chip networks by decreasing their operating frequency and supply voltage. However, adding virtual channels increases the leakage power of routers as well as the area due to their large buffers; so the runtime power gating is applied to individual virtual channels to eliminate this problem. We evaluate the performance of slow-silent virtual channels by using real application traces, and their power consumption (switching and leakage) is evaluated based on the detailed design of a virtual-channel router placed and routed with a 90 nm technology. These evaluation results show that a network with three or four virtual channels achieves the best energy efficiency in a uniform traffic. In the cases of neighboring communications, a network with two virtual channels is better than the other networks with more virtual channels, because the performance improvement from no virtual channel to two virtual channels is the largest and their frequency and supply voltage can also be reduced well in these cases.
Keywords :
low-power electronics; network-on-chip; link bandwidth; low-power on-chip networks; operating frequency; power consumption; runtime power gating; slow-silent virtual channels; small leakage power; supply voltage; switching power reduction; virtual-channel router; Bandwidth; Communication switching; Energy consumption; Energy efficiency; Frequency; Network-on-a-chip; Runtime; Telecommunication traffic; Throughput; Voltage; DVFS; Network-on-Chip; NoC; low power; power gating; virtual channels;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Networks-on-Chip, 2008. NoCS 2008. Second ACM/IEEE International Symposium on
Conference_Location :
Newcastle upon Tyne
Print_ISBN :
0-7695-3098-2
Type :
conf
DOI :
10.1109/NOCS.2008.4492722
Filename :
4492722
Link To Document :
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