DocumentCode
3291180
Title
Analyzing Parallelization and Program Performance in Heterogeneous MPSoCs
Author
Wang, Chao ; Li, Xi ; Zhang, Junneng ; Jia, Gangyong ; Chen, Peng ; Zhou, Xuehai
fYear
2012
fDate
7-9 Aug. 2012
Firstpage
489
Lastpage
491
Abstract
In this paper we extend and analyze Amdahl´s law to general heterogeneous MPSoC era, to find out how the speedup is affected by the parameters, including amount and speedup for microprocessors and accelerators, as well as the task partition characteristics. We also analyze the theoretical results about how the extended Amdahl´s Law is applied to leverage load balancing of a heterogeneous MPSoC without the abstract limitation of base core equivalents (BCEs). A prototype on FPGA is constructed with Microblaze processors and JPEG hardware accelerators. The experimental results demonstrate that our extended model reinforces state-of-the-art performance evaluation methods for hybrid MPSoC architectures and also provide creditable new insights on the heterogeneous research communities, in particular for scalable FPGA based reconfigurable MPSoCs.
Keywords
field programmable gate arrays; multiprocessing systems; parallel processing; resource allocation; system-on-chip; Amdahl law; BCE; FPGA based reconfigurable MPSoC; JPEG hardware accelerators; Microblaze processors; base core equivalents; heterogeneous MPSoC; hybrid MPSoC architectures; load balancing; parallelization analysis; program performance; Field programmable gate arrays; Hardware; IP networks; Multicore processing; Program processors; Prototypes; Amdahls law; load balance; multiprocessor system-on-chip; performance evaluation;
fLanguage
English
Publisher
ieee
Conference_Titel
Modeling, Analysis & Simulation of Computer and Telecommunication Systems (MASCOTS), 2012 IEEE 20th International Symposium on
Conference_Location
Washington, DC
ISSN
1526-7539
Print_ISBN
978-1-4673-2453-3
Type
conf
DOI
10.1109/MASCOTS.2012.61
Filename
6298210
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