• DocumentCode
    3291313
  • Title

    Lp Based Cell Selection With Constraints Of Timing, Area, And Power Consumption

  • Author

    Tamiya, Y. ; Matsunaga, Yusuke

  • fYear
    1994
  • fDate
    6-10 Nov 1994
  • Firstpage
    378
  • Lastpage
    381
  • Keywords
    CMOS logic circuits; Clocks; Delay effects; Energy consumption; Laboratories; Large scale integration; Libraries; Time factors; Timing; Tuned circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1994., IEEE/ACM International Conference on
  • ISSN
    1063-6757
  • Print_ISBN
    0-8186-3010-8
  • Type

    conf

  • DOI
    10.1109/ICCAD.1994.629822
  • Filename
    629822