Analysis and design of CMOS Doherty power amplifier using voltage combining method

Author

Chenxi Zhao ; Byungjoon Park ; Yunsung Cho ; Bumman Kim

Author_Institution

Dept. of Electr. Eng., Pohang Univ. of Sci. & Technol., Pohang, South Korea

fYear

2013

fDate

14-18 April 2013

Firstpage

1

Lastpage

4

Abstract

A 1.75GHz CMOS Doherty power amplifier (PA) is presented. This Doherty PA uses voltage combining method that is different from the conventional current combining Doherty amplifier based on HBT. The output transformer is employed to combine the output power and realize the load modulation. The proposed CMOS Doherty PA is fabricated in 180nm CMOS process. Simulation results show that the output transformer acts as an impedance inverter and reduces the load impedance of carrier amplifier when the peaking amplifier turns, that meet the load modulation Doherty PA operation. The prototype achieves a maximum output power of +28.6dBm with a peak power-added efficiency (PAE) of 31.6% by using 3.4 V supply voltage. The PAE is kept above 25% over a 6 dB range of output power. It shows clearly the efficiency enhancement at the power back-off point due to the Doherty operation.

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF power amplifiers; integrated circuit design; invertors; CMOS Doherty power amplifier; carrier amplifier impedance; efficiency 31.6 percent; frequency 1.75 GHz; impedance inverter; load modulation Doherty PA operation; output transformer; power added efficiency; size 180 nm; voltage 3.4 V; voltage combining method; CMOS integrated circuits; Impedance; Modulation; Power amplifiers; Power generation; Standards; Wireless communication; Doherty; load modulation; power amplifier; voltage combining transformer;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless Symposium (IWS), 2013 IEEE International

Conference_Location

Beijing

Type

conf

DOI

10.1109/IEEE-IWS.2013.6616725

Filename

6616725