Title :
A 1mW CMOS limiting amplifier and RSSI for ZigBee™ applications
Author :
Ruiming Luo ; Xuefei Bai ; Shengxi Diao ; Fujiang Lin
Author_Institution :
Dept. of Electron. Sci. & Technol., Univ. of Sci. & Technol. of China, Hefei, China
Abstract :
This paper presents a low-power intermediate frequency (IF) limiting amplifier (LA) and received signal strength indicator (RSSI). The LA and RSSI are designed for ZigBee™ receiver at 2MHz IF. To save power, two local loops for offset correction are used in LA chain and a sensitivity of -56dBm is achieved. Each LA gain stage employs cascade diodes load to avoid driving the diode load into velocity saturation region. The indication rang is 50dB within ±2dB linearity error. The core area is 0.11×0.31mm2 using a SMIC 0.18-μm CMOS technology. The overall power consumption is 1mW from a 1.8V supply voltage.
Keywords :
CMOS analogue integrated circuits; Zigbee; amplifiers; low-power electronics; radio receivers; CMOS limiting amplifier; LA chain; LA gain stage; RSSI; SMIC CMOS technology; ZigBee applications; ZigBee receiver; diode load; low-power intermediate frequency limiting amplifier; offset correction; power 1 mW; received signal strength indicator; size 0.18 mum; velocity saturation region; voltage 1.8 V; CMOS integrated circuits; Gain; Limiting; Linearity; Power demand; Rectifiers; Sensitivity; CMOS; IF; Limiting amplifier; RSSI; ZigBeeTM; low power;
Conference_Titel :
Wireless Symposium (IWS), 2013 IEEE International
Conference_Location :
Beijing
DOI :
10.1109/IEEE-IWS.2013.6616734
