DocumentCode :
3291867
Title :
FPGA Implementation of Sigma-Delta Modulators in Fractional-N Frequency Synthesis
Author :
Wang, Hongyu ; Brennan, Paul V. ; Jiang, Dai
Author_Institution :
Univ. Coll. London, London
Volume :
1
fYear :
2007
fDate :
13-14 July 2007
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents three high performance sigma-delta modulators (SDMs) including a single stage third order modulator and two MASH modulators. The SDMs are successfully implemented by FPGA. Both simulated and measured results are presented and compared discussed. By employing the proposed techniques, the fractional-N frequency synthesiser presented a tonal-free spectrum without the affections of integer or fractional spurs. The in-band phase noise of the synthesiser is lower than -90 dBc/Hz. The final output spectrum of the frequency synthesiser demonstrates the advantage and extensibility of this technique.
Keywords :
field programmable gate arrays; frequency synthesizers; phase noise; sigma-delta modulation; FPGA implementation; MASH modulators; fractional N frequency synthesis; in band phase noise; sigma delta modulators; single stage third order modulator; Delta-sigma modulation; Field programmable gate arrays; Frequency conversion; Frequency modulation; Frequency synthesizers; Low-frequency noise; Multi-stage noise shaping; Noise shaping; Phase noise; Quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Circuits and Systems, 2007. ISSCS 2007. International Symposium on
Conference_Location :
Iasi
Print_ISBN :
1-4244-0969-1
Electronic_ISBN :
1-4244-0969-1
Type :
conf
DOI :
10.1109/ISSCS.2007.4292694
Filename :
4292694
Link To Document :
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