DocumentCode :
3292474
Title :
Double snapback effect in LDMOS based on non-isothermal simulation
Author :
Shan, Hui ; Xia, Jianbao ; Luo, Xiangdong ; Guo, Yufeng
Author_Institution :
Jiangsu Key Lab. of ASIC Design, Nantong Univ., Nantong, China
fYear :
2011
fDate :
15-17 April 2011
Firstpage :
2121
Lastpage :
2124
Abstract :
This paper reports a novel effect in Lateral Diffused MOS (LDMOS) transistors-double snapback effect. Based on non-isothermal simulation, we find the IV characteristic of LDMOS exhibits twice snapbacks phenomenon. TCAD tools are employed to investigate the physical mechanism of the double snapback phenomenon. The results show that the first snapback is a electrical snapback, while the second snapback is a thermal snapback. In more detail, the first snapback is induced by turn-on of the parasitic bipolar transistor activated by hole current density due to the avalanche ionization. The second snapback is originated from the thermal run-away due to the significant increase of the drain junction temperature.
Keywords :
MOSFET; bipolar transistors; hole density; technology CAD (electronics); IV characteristic; LDMOS transistor; TCAD tools; avalanche ionization; double snapback effect; drain junction temperature; electrical snapback; hole current density; lateral diffused MOS transistors; nonisothermal simulation; parasitic bipolar transistor; thermal run-away; thermal snapback; Bipolar transistors; Current density; Heating; Junctions; Lattices; Logic gates; Resistance; Double snapback; lateral diffused MOS (LDMOS); negative resistance effect; parasitic bipolar transistor; thermal effect;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electric Information and Control Engineering (ICEICE), 2011 International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-8036-4
Type :
conf
DOI :
10.1109/ICEICE.2011.5778274
Filename :
5778274
Link To Document :
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