DocumentCode
3292577
Title
CMOS implementation of programmable logic gates and pipelined full adders using threshold logic gates based on NDR devices
Author
Mira, Ramy ; El-Sayed, Mohamed ; El-Faramawy, Nema
Author_Institution
Dept. of Electr. Eng., Alexandria Univ., Egypt
fYear
2004
fDate
16-18 March 2004
Lastpage
42377
Abstract
This paper presents a new prototyping technique, which allows efficient verification of circuit concepts based on negative differential resistance (NDR) devices. This prototype, which is called MOS-NDR, has been used to implement programmable logic gates and pipelined-ripple-carry full adders using linear threshold gates (LTGs).
Keywords
CMOS logic circuits; adders; logic gates; programmable logic devices; threshold logic; LTG; MOS-NDR; NDR device; linear threshold gate; negative differential resistance; pipelined-ripple-carry full adder; programmable logic gate; prototyping technique; Adders; CMOS logic circuits; CMOS technology; Logic circuits; Logic devices; Logic gates; Programmable logic arrays; Programmable logic devices; Prototypes; Resonant tunneling devices;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Science Conference, 2004. NRSC 2004. Proceedings of the Twenty-First National
Print_ISBN
977-5031-77-X
Type
conf
DOI
10.1109/NRSC.2004.1321855
Filename
1321855
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