DocumentCode
3292884
Title
A nano-functional-device-based image feature extraction circuitry with current-balancing feedback
Author
Yoshii, Kazuma ; Shibata, Tadashi
Author_Institution
Dept. of Frontier Inf., Univ. of Tokyo, Tokyo
fYear
2009
fDate
18-20 March 2009
Firstpage
233
Lastpage
236
Abstract
An image feature extraction VLSI architecture using resonance current-voltage (I-V) characteristics has been proposed aiming at demonstrating a new potentiality of nano functional devices for use in building human-like intelligent systems. In this work, the resonance characteristics of nano devices have been emulated by CMOS inverter-based convolution circuits and directional edge filtering was carried out by subthreshold operation of CMOS circuits. In order to retain only essential features in the input image, a current-balancing feedback circuitry has been explored. The circuit can select relatively significant edges and leave them as digital flags autonomously. In order to verify the concept, a small-scale circuit was designed in a standard 0.18-mum CMOS technology, and its correct operation was confirmed by SPICE simulation.
Keywords
CMOS integrated circuits; SPICE; VLSI; feature extraction; filtering theory; CMOS inverter-based convolution circuits; CMOS technology; SPICE simulation; VLSI architecture; current-balancing feedback; directional edge filtering; human-like intelligent systems; image feature extraction; nanofunctional device; resonance current-voltage characteristics; size 0.18 mum; Buildings; CMOS technology; Convolution; Feature extraction; Feedback circuits; Intelligent structures; Intelligent systems; RLC circuits; Resonance; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Ultimate Integration of Silicon, 2009. ULIS 2009. 10th International Conference on
Conference_Location
Aachen
Print_ISBN
978-1-4244-3704-7
Type
conf
DOI
10.1109/ULIS.2009.4897579
Filename
4897579
Link To Document