DocumentCode :
3293475
Title :
Metal FEAs on double layer structure of polycrystalline silicon
Author :
Kim, Il Hwan ; Lee, Chun Gyoo ; Park, Byung Gook ; Lee, Jong Duk ; Won, Joha Hyun
Author_Institution :
Inter-Univ. Semicond. Res. Center, Seoul Nat. Univ., South Korea
fYear :
1996
fDate :
7-12 Jul 1996
Firstpage :
423
Lastpage :
426
Abstract :
Metal field emitter arrays were fabricated on a single polysilicon layer and on a double polysilicon layer. From the observation of metal field emitters fabricated on the single polysilicon layer, it was noticed that the irregular shape of the gate hole was caused by the large grain of polysilicon. To suppress the grain growth of doped polysilicon during oxidation, an undoped polysilicon layer was used to form a gate insulator and a doped polysilicon layer was used to serve as a conducting layer. Due to the small grain size of undoped polysilicon, the shape of gate aperture was improved to be as symmetric as in single crystal silicon
Keywords :
electron field emission; grain growth; grain size; silicon; vacuum microelectronics; doped polysilicon conducting layer; double layer structure; gate aperture shape; grain growth suppression; grain size; metal FEA; metal field emitter arrays; polycrystalline Si; polysilicon layer; undoped polysilicon gate insulator; Apertures; Fabrication; Field emitter arrays; Grain size; Insulation; Oxidation; Sandwich structures; Shape; Silicon; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Vacuum Microelectronics Conference, 1996. IVMC'96., 9th International
Conference_Location :
St. Petersburg
Print_ISBN :
0-7803-3594-5
Type :
conf
DOI :
10.1109/IVMC.1996.601856
Filename :
601856
Link To Document :
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