Capacitance-voltage test using an SEM nanoprober

The move from one technology node to the next, with the associated transistor geometries shrink, has significantly increased the occurrence of SRAM bit cell errors. Advanced failure analysis labs have employed scanning electron microscope (SEM) based probing systems to isolate individual failed transistors using the Vt curves and Id-Vd family of curves. However, the bit cell errors caused by interface trapped charges and doping related issues may not be thoroughly analyzed using these standard probing electrical tests. Hence, capacitance-voltage (C-V) measurements that are capable of studying oxide layers, interface traps, and charge carrier densities, are considered an appropriate tool to evaluate these conditions. In this communication, we demonstrate C-V testing on gate oxide of individual transistors from the SRAM of an IntelTM 45 nm microprocessor using a Zyvex nanoprobing system and Keithley 4200 parametric analyzer fitted with the C-V option.