Title :
Rc Interconnect Synthesis-a Moment Fitting Approach
Author :
Menezes, Noel ; Pullela, Satyamurthy ; Dartu, Florentin ; Pillage, Lawrence T.
Keywords :
Contracts; Delay effects; Design optimization; Integrated circuit interconnections; Integrated circuit synthesis; Integrated circuit technology; Logic gates; Signal design; Signal synthesis; Wire;
Conference_Titel :
Computer-Aided Design, 1994., IEEE/ACM International Conference on
Print_ISBN :
0-8186-3010-8
DOI :
10.1109/ICCAD.1994.629837
