Title :
Method for Fast and Accurate Calibration of Litho Simulator for Hot Spot Analysis
Author :
Jank, Stefan ; Temchenko, V. ; Karakatsanis, P.G. ; Veerasingam, R. ; Vallishayee, Rakesh ; Dolainsky, Christoph ; Xiaojing Yang ; Nehmadi, Y. ; Poyastro, M.
Author_Institution :
Infineon Technol., Dresden
Abstract :
Deploying OPC that is robust over the process window is becoming more and more challenging as geometries shrink. This challenge has a major impact in time-to-market and yield of new products. This paper describes a litho simulator calibration flow using a streamlined OPC verification methodology. This new methodology successfully bridges design and manufacturing to accelerate the OPC development process and proactively identifies weak OPC locations that can reduce yield. The method includes an accurate simulator calibration using automatically obtained ´on silicon´ measurement data, followed by full-chip litho simulation using the calibrated model to identify potential hot spots on product. The method also enabled a short cycle feedback loop to the OPC model generation resulting in improved OPC optimization and verification.
Keywords :
calibration; formal verification; integrated circuit yield; lithography; semiconductor process modelling; time to market; OPC development process; OPC model generation; OPC optimization; accurate simulator calibration; hot spot analysis; litho simulator calibration flow; on silicon measurement; products yield; short cycle feedback loop; streamlined OPC verification; time-to-market; Acceleration; Analytical models; Bridges; Calibration; Design methodology; Geometry; Manufacturing processes; Robustness; Silicon; Time to market;
Conference_Titel :
Semiconductor Manufacturing, 2006. ISSM 2006. IEEE International Symposium on
Conference_Location :
Tokyo
Print_ISBN :
978-4-9904138-0-4
DOI :
10.1109/ISSM.2006.4493134