Title : 
Iterative Algorithms For Formal Verification Of Embedded Real-time Systems
         
        
            Author : 
Balarin, Felice ; Sangiovanni-Vincentelli, Alberto L.
         
        
        
        
        
        
            Keywords : 
Automata; Concurrent computing; Embedded computing; Embedded system; Formal verification; Iterative algorithms; Real time systems; State-space methods; Time measurement; Timing;
         
        
        
        
            Conference_Titel : 
Computer-Aided Design, 1994., IEEE/ACM International Conference on
         
        
        
            Print_ISBN : 
0-8186-3010-8
         
        
        
            DOI : 
10.1109/ICCAD.1994.629842