Title :
P-N Junctions with Floating Guard Rings Structure Design Methodology
Author :
Krasukov, Anton U.
Author_Institution :
Tech. Univ., Moscow
fDate :
June 1 2007-July 5 2007
Abstract :
Program implementation of high voltage p-n-junctions with floating guard rings design methodology is done.
Keywords :
avalanche breakdown; p-n junctions; power transistors; avalanche breakdown; floating guard rings; high voltage p-n-junctions; structure design methodology; Avalanche breakdown; Breakdown voltage; Design methodology; Integral equations; Ionization; Mesh generation; Numerical simulation; P-n junctions; Poisson equations; Power transistors; avalanche breakdown; floating rings; numerical simulation;
Conference_Titel :
Electron Devices and Materials, 2007. EDM '07. 8th Siberian Russian Workshop and Tutorial on
Conference_Location :
Erlagol, Altai
Print_ISBN :
978-5-7782-0752-3
DOI :
10.1109/SIBEDM.2007.4292924