Title :
A CMOS phase/frequency detector with a high-speed low-power D-type master-slave flip-flop
Author :
Chen, Yubtzuan ; Tu, Chih Ho ; Wu, Jein
Author_Institution :
Dept. of Electron. Eng., Feng Chia Univ., Taichung, Taiwan
Abstract :
An improved CMOS Phase/Frequency Detector (PFD) is presented. A high-speed low-power CMOS D-type master-slave flip-flop is proposed and adopted in the PFD. Higher speed and lower power operation are attributed to the reduced node capacitance. Charge-sharing phenomena are circumvented in the proposed PFD. The proposed PFD shows improvement in frequency sensitivity at high operating frequency. The proposed PFD is suitable for high-speed low-power operation.
Keywords :
CMOS digital integrated circuits; detector circuits; flip-flops; high-speed integrated circuits; low-power electronics; phase locked loops; CMOS phase/frequency detector; D-type master-slave flip-flop; PLLs; frequency sensitivity; high-speed CMOS flip-flop; low-power CMOS flip-flop; node capacitance reduction; Asynchronous transfer mode; Capacitance; Circuits; Flip-flops; Latches; MOSFETs; Master-slave; Phase detection; Phase frequency detector; Phase locked loops;
Conference_Titel :
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN :
0-7803-7523-8
DOI :
10.1109/MWSCAS.2002.1187055
