• DocumentCode
    3296052
  • Title

    A novel design for deadzone-less fast charge pump with low harmonic content at the output

  • Author

    Bahreyni, Behraad ; Filanovsky, I.M. ; Shafai, C.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Manitoba Univ., Winnipeg, Man., Canada
  • Volume
    3
  • fYear
    2002
  • fDate
    4-7 Aug. 2002
  • Abstract
    A novel design for a charge pump is presented. Unlike common charge pumps where the transistors are operating as switches, in this design transistors are kept in their saturation region at all times. This design has resulted in faster operation of the pump in addition to lower levels of output harmonic content. The actual strong point of this design is the smooth change of the output current. This may result in small spurious and phase noise levels if this charge pump is used in a PLL or frequency synthesizer. Comparison of simulation results for this circuit and those of a regular charge pump reveals the potential superiority or this design over traditional circuits.
  • Keywords
    CMOS integrated circuits; convertors; frequency synthesizers; phase locked loops; voltage multipliers; PLL; deadzone-less fast charge pump; frequency synthesizer; low harmonic content; output harmonic content; spurious signal; transistor saturation region; Charge pumps; Circuits; Filters; Frequency conversion; Phase frequency detector; Phase locked loops; Phase noise; Switches; Voltage; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
  • Print_ISBN
    0-7803-7523-8
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2002.1187057
  • Filename
    1187057