A resistance change methodology for the study of electromigration in Al-Si interconnects

A DC resistometric method has been developed that provides a substantial reduction in electromigration test times of Al-Si thin films. The technique has been used to detect relative resistance changes in the IE-4 to IE-2 range. A simulation has been performed showing that resistance changes of this magnitude can be produced by the presence of small voids. The kinetics of the individual void nucleation and growth is believed to prevent the observation of constant rates of resistance change for individual units. The problem can be eliminated by the use of distributions where the rates of resistance change are constant for a total increase of up to 1%. Measurements of the activation energy and the current density dependence made by using the proposed methodology are presented. The correlation between the median-time-to-failure (MTF) and the rate of resistance change has been investigated and shows an almost inverse relationship for the range tested. Time-reduction factors of 20 to 50 appear practical with this technique, which should allow an easier evaluation of the electromigration under low-stress conditions like low J, low T, and bidirectional and pulsed currents