• DocumentCode
    3296634
  • Title

    GPU and CPU Cooperative Accelaration for Face Detection on Modern Processors

  • Author

    Li, Eric ; Wang, Bin ; Yang, Liu ; Peng, Ya-ti ; Du, Yangzhou ; Zhang, Yimin ; Chiu, Yi-Jen

  • Author_Institution
    Intel Labs. China, Beijing, China
  • fYear
    2012
  • fDate
    9-13 July 2012
  • Firstpage
    769
  • Lastpage
    775
  • Abstract
    Along with the inclusion of GPU cores within the same CPU die, the performance of Intel´s processor-graphics has been significantly improved over earlier generation of integrated graphics. The need to efficiently harness the computational power of the GPU in the same CPU die is more than ever. This paper presents a highly optimized Haar-based face detector which efficiently exploits both CPU and GPU computing power on the latest Sandy Bridge processor. The classification procedure of Haar-based cascade detector is partitioned to two phases in order to leverage both thread level and data level parallelism in the GPU. The image downscaling and integral image calculation running in the CPU core can work with the GPU in parallel. Compared to CPU-alone implementation, the experiments show that our proposed GPU accelerated implementation achieves a 3.07x speedup with more than 50% power reduction on the latest Sandy Bridge processor. On the other hand, our implementation is also more efficient than the CUDA implementation on the NVidia GT430 card in terms of performance as well as power. In addition, our proposed method presents a general approach for task partitioning between CPU and GPU, thus being beneficial not only for face detection but also for other multimedia and computer vision techniques.
  • Keywords
    Haar transforms; computer vision; face recognition; graphics processing units; image classification; multimedia systems; object detection; parallel processing; CPU cooperative accelaration; GPU cores; Haar-based cascade detector; Haar-based face detector; Intel processor-graphics; Sandy Bridge processor; classification procedure; computer vision techniques; data level parallelism; face detection; image downscaling; integral image calculation; modern processors; multimedia; task partitioning; thread level parallelism; Computer architecture; Face detection; Feature extraction; Graphics processing unit; Instruction sets; Parallel processing; CPU cooperative computing; Face detection; GPU; GenX GPU architecture; Haar feature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multimedia and Expo (ICME), 2012 IEEE International Conference on
  • Conference_Location
    Melbourne, VIC
  • ISSN
    1945-7871
  • Print_ISBN
    978-1-4673-1659-0
  • Type

    conf

  • DOI
    10.1109/ICME.2012.121
  • Filename
    6298496