• DocumentCode
    3296954
  • Title

    Design, cost, size, and performance trade-offs of SOIC SMT technology vs. hybrid circuit technology

  • Author

    Lamfers, Daryl D.

  • Author_Institution
    Alliant Techsyst., Mukilteo, WA, USA
  • fYear
    1996
  • fDate
    4-6 Nov 1996
  • Firstpage
    296
  • Lastpage
    299
  • Abstract
    The requirements for amplification of very low level signals usually demands that the physical layout of the components be as compact as possible and that the circuit routing interconnect of the components be shielded so that any effects from external interference is minimized. The packaging implementation with these design constraints is the basis of the first trade-off question. Should packaged components be used to implement the design or should a hybrid be designed? This question is expanded further to include the evaluation of performance vs. size vs. cost as they apply to the specific design, the project size, and the expected life cycle of the project. All of these factors determine the packaging method and the final product configuration
  • Keywords
    hybrid integrated circuits; integrated circuit packaging; surface mount technology; SOIC SMT technology; cost; design constraints; hybrid circuit technology; packaged components; performance tradeoffs; product configuration; Assembly; Capacitors; Circuit testing; Costs; Electronics packaging; Integrated circuit interconnections; Integrated circuit packaging; Resistors; Semiconductor device testing; Surface-mount technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Northcon/96
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    0-7803-3277-6
  • Type

    conf

  • DOI
    10.1109/NORTHC.1996.564938
  • Filename
    564938