Scrambled storage for parallel memory systems

A scrambled storage scheme is proposed for storage arrays of N ×N elements in N=2ⁿ parallel memory-modules to allow conflict-free access to various array partitions. It is shown that the scheme allows conflict-free access to rows, columns, square blocks, and distributed blocks of stored arrays. An alternative way of achieving the desired accessibility would use P. Budnik and D.J. Kuck´s (1971) nonuniform skewed storage; in this case, addressing hardware would require O(n×2ⁿ) exclusive-OR circuits. The proposed scheme has, however, the advantage of simplifying address generation; addressing hardware requires n exclusive-OR circuits only. Some of the important questions of scrambling/unscrambling data through a proposed interconnection network are discussed