DocumentCode
3298746
Title
Notice of Retraction
Research and design of 1553B protocol Bus Control Unit
Author
Liang Zhijian
Author_Institution
Sch. of Electron. & Comput. Sci. & Technol., North Univ. of China, Taiyuan, China
fYear
2010
fDate
25-27 June 2010
Firstpage
330
Lastpage
333
Abstract
Notice of Retraction
After careful and considered review of the content of this paper by a duly constituted expert committee, this paper has been found to be in violation of IEEE´s Publication Principles.
We hereby retract the content of this paper. Reasonable effort should be made to remove all past references to this paper.
The presenting author of this paper has the option to appeal this decision by contacting TPII@ieee.org.
This paper introduces a new design methods of 1553B protocol BCU (Bus Control Unit), the bus controller is an important component part in the communication system, the main hardware platform is the FPGA(Field Programmable Gata Array) chip called XC2V2000 of Xilinx company. Based on in-depth study 1553B bus transport protocols and foreign design method of chip, and combined with popular EDA technology, the paper designed successfully the digital 1553B mil STD BCU under the top-down design method, proved to be correct on self-designed experiment board also.
After careful and considered review of the content of this paper by a duly constituted expert committee, this paper has been found to be in violation of IEEE´s Publication Principles.
We hereby retract the content of this paper. Reasonable effort should be made to remove all past references to this paper.
The presenting author of this paper has the option to appeal this decision by contacting TPII@ieee.org.
This paper introduces a new design methods of 1553B protocol BCU (Bus Control Unit), the bus controller is an important component part in the communication system, the main hardware platform is the FPGA(Field Programmable Gata Array) chip called XC2V2000 of Xilinx company. Based on in-depth study 1553B bus transport protocols and foreign design method of chip, and combined with popular EDA technology, the paper designed successfully the digital 1553B mil STD BCU under the top-down design method, proved to be correct on self-designed experiment board also.
Keywords
field programmable gate arrays; protocols; 1553B protocol bus control unit; FPGA chip; Xilinx company; bus transport protocols; communication system; field programmable gate array; top-down design method; Broadcasting; Communication system control; Control systems; Design methodology; Educational technology; Hardware; Logic; Military computing; Paper technology; Transport protocols; 1553B; bus control unit; decode; design; encode;
fLanguage
English
Publisher
ieee
Conference_Titel
Educational and Network Technology (ICENT), 2010 International Conference on
Conference_Location
Qinhuangdao
Print_ISBN
978-1-4244-7660-2
Type
conf
DOI
10.1109/ICENT.2010.5532154
Filename
5532154
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