• DocumentCode
    3299436
  • Title

    Requirements for network-on-chip benchmarking

  • Author

    Salminen, Erno ; Kangas, Tero ; Riihimäki, Jouni ; Hämäläinen, Timo D.

  • Author_Institution
    Tampere Univ. of Technol., Finland
  • fYear
    2005
  • fDate
    21-22 Nov. 2005
  • Firstpage
    82
  • Lastpage
    85
  • Abstract
    This work presents the motivation, basic concepts, and requirements for benchmarking a network-on-chip (NoC). Currently there is practically no benchmark sets for NoC or the presented tools do not meet the requirements. The presented benchmarking method utilizes traffic generator with a dataflow models of the applications. Combined with transaction-level NoC, the abstract application model allows approximately 200× speedup and on average 10% error in estimated runtime w.r.t. cycle-accurate HW/SW cosimulation without exposing the exact internal functionality of the application.
  • Keywords
    benchmark testing; circuit simulation; hardware-software codesign; integrated circuit testing; microprocessor chips; network-on-chip; cycle-accurate HW/SW co-simulation; dataflow models; network-on-chip benchmarking; traffic generator; Benchmark testing; Computational modeling; Computer errors; Computer simulation; Delay; Fault tolerance; Network-on-a-chip; Throughput; Timing; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    NORCHIP Conference, 2005. 23rd
  • Print_ISBN
    1-4244-0064-3
  • Type

    conf

  • DOI
    10.1109/NORCHP.2005.1596994
  • Filename
    1596994