Title :
Efficient edge profiling for ILP-processors
Author :
Eichenberger, Alexandre E. ; Lobo, Sheldon M.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Abstract :
Compilers for VLIW and superscalar machines increasingly use dynamic application behavior or profiling information in optimizations such as instruction scheduling, speculative code motion, and code layout. Hence it is extremely useful to develop inexpensive techniques that gather accurate profiling information. This paper presents novel edge profiling techniques that greatly reduce run-time overhead by efficiently exploiting instruction level parallelism between application and instrumentation. Best results are achieved when speculatively executing a software pipelined version of the instrumentation code. For an 8-wide issue machine, measurements for the SPECint95 benchmarks indicate a 10-fold reduction in overhead (from 32.8% to 3.3%), when compared with previous techniques
Keywords :
parallel programming; program compilers; ILP-processors; code layout; compilers; edge profiling; instruction level parallelism; instruction scheduling; optimizations; speculative code motion; Application software; Counting circuits; Dynamic compiler; Hardware; Instruments; Magnetic heads; Optimizing compilers; Parallel processing; Probes; VLIW;
Conference_Titel :
Parallel Architectures and Compilation Techniques, 1998. Proceedings. 1998 International Conference on
Conference_Location :
Paris
Print_ISBN :
0-8186-8591-3
DOI :
10.1109/PACT.1998.727264