Title :
A novel SVPWM scheme for common-mode voltage reduction in five-level active NPC inverters
Author :
Quoc Anh Le ; Dong-Choon Lee
Author_Institution :
Dept. of Electr. Eng., Yeungnam Univ., Gyeongsan, South Korea
Abstract :
In this paper, a novel space vector pulse width modulation (SVPWM) scheme for reducing the common-mode voltage (CMV) in the three-phase five-level active neutral-point clamped (5L-ANPC) inverter for the machine drive systems is proposed, where only the 55 selected voltage vectors with low values of CMV instead of all 125 voltage vectors are utilized. This PWM scheme can significantly reduce the common-mode voltage without the increase of switching loss and total harmonic distortion (THD) of the output voltages compared with the conventional one. With the 55 voltage vectors only, the inverter can still work in the full range of modulation index (MI). In addition, the DC-link capacitor and flying capacitor voltages can also be controlled for balancing. The PSIM simulation results show that the peak value of the CMV is decreased to one twelfth of the DC-link voltage.
Keywords :
PWM invertors; control engineering computing; power capacitors; power engineering computing; vectors; voltage control; 5L-ANPC; CMV reduction; DC-link capacitor voltage control; PSIM simulation; SVPWM scheme; common-mode voltage reduction; flying capacitor voltage control; full modulation index range; space vector pulse width modulation scheme; switching loss; three-phase five-level active NPC inverters; three-phase five-level active neutral-point clamped inverter; total harmonic distortion; voltage vectors; Capacitors; Inverters; Space vector pulse width modulation; Switches; Voltage control; Active neutral point clamped inverter; common-mode voltage; multilevel inverter; space vector pulse width modulation;
Conference_Titel :
Power Electronics and ECCE Asia (ICPE-ECCE Asia), 2015 9th International Conference on
Conference_Location :
Seoul
DOI :
10.1109/ICPE.2015.7167799