• DocumentCode
    3300021
  • Title

    Run-time dynamic reconfiguration: a reality check based on FPGA architectures from Xilinx

  • Author

    Wu, Kehuai ; Madsen, Jan

  • Author_Institution
    Dept. of Informatics & Mathematic Modelling, Tech. Univ. of Denmark, Copenhagen, Denmark
  • fYear
    2005
  • fDate
    21-22 Nov. 2005
  • Firstpage
    192
  • Lastpage
    195
  • Abstract
    Dynamically adaptable computing systems is a promising research area aimed at developing systems which can adapt to changes in their environment while executing. The premises for such systems are advanced reconfigurable computing systems which allow for fast and partial reconfiguration. In this paper, we present our experience with runtime dynamic reconfiguration based on the state-of-the-art FPGA architecture from Xilinx, the Virtex family. We pinpoint pitfalls and shortcomings and propose solutions to overcome some of these. Finally, we address the required improvements needed to make dynamic reconfiguration feasible for realistic systems.
  • Keywords
    field programmable gate arrays; logic design; reconfigurable architectures; FPGA architectures; Xilinx Virtex family; dynamically adaptable computing systems; reconfigurable computing systems; run-time dynamic reconfiguration; runtime dynamic reconfiguration; Application specific integrated circuits; Computer architecture; Fabrication; Field programmable gate arrays; Informatics; Logic devices; Mathematical model; Mathematics; Prototypes; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    NORCHIP Conference, 2005. 23rd
  • Print_ISBN
    1-4244-0064-3
  • Type

    conf

  • DOI
    10.1109/NORCHP.2005.1597022
  • Filename
    1597022