Unveiling the Intel branch predictors

The advent of ultra deep sub micron (UDSM) era, has led to unprecedented increase in the clock speeds, performance capacity and throughput of the modern day processors. In this scenario, even a meager amount of branch misprediction becomes a major bottleneck to the overall performance of the processor. Intel´s policy of hiding the details of its branch predictor configuration has forced a lot of speculation on the exact organization and structure of the same. This report is an attempt at unveiling the Intel branch predictors, supported by strong simulation results to justify the conclusions. The paper restricts itself to the Prescott core of the latest Intel Pentium 4 processor, and cross-examines the outcome predictor of the same. All claims made in the paper, are vouched by matching the performance with software simulated counterparts.