• DocumentCode
    3300405
  • Title

    A non-binary capacitor array calibration circuit with 22-bit accuracy in successive approximation analog-to-digital converters

  • Author

    Gan, Jianhua ; Abraham, Jacob

  • Author_Institution
    Cirrus Logic, Austin, TX, USA
  • Volume
    1
  • fYear
    2002
  • fDate
    4-7 Aug. 2002
  • Abstract
    A novel capacitor array calibration circuit is presented in this paper. A non-binary capacitor array with 20 capacitors is used. The capacitor calibration algorithm is based on a perceptron learning rule, developed for artificial intelligence applications. The capacitor weights are adaptively calibrated to match the physical capacitors with up to 22 bit accuracy. Capacitor matching is not a limiting factor to the resolution. A mixed-signal microcontroller architecture is used to efficiently implement the novel capacitor array calibration algorithm. This calibration circuit is being used to design a 1.5 Mega samples per second (MSPS), 16 bit, 50 mW successive approximation analog-to-digital converter (ADC).
  • Keywords
    analogue-digital conversion; calibration; capacitors; network synthesis; perceptrons; 16 bit; 22 bit; 50 mW; ADC resolution; adaptive calibration; analog-to-digital converters; artificial intelligence; capacitor matching accuracy; capacitor weights; mixed-signal microcontroller architecture; nonbinary capacitor array calibration circuit; perceptron learning rule; successive approximation ADC; Adaptive arrays; Analog-digital conversion; Artificial intelligence; Calibration; Capacitance; Capacitors; Circuits; Learning; Logic arrays; Redundancy;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
  • Print_ISBN
    0-7803-7523-8
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2002.1187284
  • Filename
    1187284